Inactive

NIST-FY25-CHIPS-0095 6695 / 334516 Title:? Custom Silicon Carbide Transistors BACKGROUND The National Institute of Standards and Technology (NIST) requires the design and fabrication of custom silicon... NIST-FY25-CHIPS-0095 6695 / 334516 Title:? Custom Silicon Carbide Transistors BACKGROUND The National Institute of Standards and Technology (NIST) requires the design and fabrication of custom silicon carbide transistors on pre-diced 5 x 5 mm2 substrates. The substrates must be provided by NIST and will have an epitaxial layer with modified isotopic ratio. The transistors will be used to further our research of quantum-based magnetic field sensors with the goal of improving SWAP-C optimization of the technology for a variety of application spaces. Minimum Requirements The items shall meet or exceed the minimum requirements identified below. All items must be new. Used or remanufactured equipment will not be considered for award. Experimental, or prototype equipment will not be considered. The use of “gray market” components not authorized for sale in the U.S. by the proposer is not acceptable. All line items shall be shipped in the original manufacturer’s packaging and include all original documentation and software, when applicable. All specifications below must be verified at NIST before final acceptance. The custom silicon carbide transistors will meet the minimum salient characteristics identified below. Shall be fabricated using NIST-provided 5 x 5 mm2 substrates. All fabrication steps must accommodate the small sample size. Shall be designed with input from the NIST team; iterative design with layout drafts is required before fabrication. Shall be fabricated with steps that mimic an industrial process flow. The process used must be capable of producing functional metal-oxide-semiconductor field-effect transistors (MOSFETs) with measurable threshold voltage. The transistor gates must be able to withstand a voltage of 20 V for 10 minutes without catastrophic breakdown. The fabrication process must not damage or replace the isotopically-enriched epitaxial layer present on the NIST-provided substrates. Each 5 x 5 mm2 substrate should contain as many transistors as possible or a minimum of six. QUESTIONS REGARDING THIS NOTICE Questions regarding this notice may be submitted via email to the Primary Point of Contact and the Secondary Point of Contact listed in this notice. Questions should be submitted so that they are received by 12:00 p.m. Eastern Time on July 21, 2025. Questions will be anonymized and answered via sources sought notice amendment following the question submission deadline. IMPORTANT NOTES The information received in response to this notice will be reviewed and considered so that the NIST may appropriately solicit for its requirements in the near future. This notice should not be construed as a commitment by the NIST to issue a solicitation or ultimately award a contract. This notice is not a request for a quotation. Responses will not be considered as proposals or quotations. No award will be made as a result of this notice. NIST is not responsible for any costs incurred by the respondents to this notice. NIST reserves the right to use information provided by respondents for any purpose deemed necessary and appropriate. Thank you for taking the time to submit a response to this request.